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[VHDL-FPGA-Verilog] fftmatlab

Description: fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 7168 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] fft

Description: fft源代码，希望对大家有用，谢谢 fft源代码，希望对大家有用，-fft source code, in the hope that useful to everybody, thank you fft source code, in the hope that useful to everybody,
Platform: | Size: 1024 | Author: 111 | Hits:

[Graph Drawing] ifft_fft_unitygain72

Description: Unity Gain Cascaded IFFT and FFT Pair Design Example v7.2
Platform: | Size: 10240 | Author: | Hits:

[VHDL-FPGA-Verilog] FPGA_FFT

Description: 基于FPGA的高速FFT处理器的设计与实现-FPGA-based high-speed FFT Processor Design and Implementation
Platform: | Size: 73728 | Author: 萧球水 | Hits:

[Software Engineering] fpgafft

Description: :文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行 分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。 最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。-Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs.
Platform: | Size: 220160 | Author: 王晓 | Hits:

[Software Engineering] FPGA_4FFT

Description: 针对高速数字信号处理的要求,提出用FPGA 实现基- 4FFT 算法,并对其整体结构、蝶形单 元进行了分析. 采用蝶算单元输入并行结构和同址运算,能同时提供蝶形运算所需的4 个操作 数,具有最大的数据并行性,能提高处理速度 按照旋转因子存放规则,蝶形运算所需的3 个旋转 因子地址相同,且寻址方式简单 输出采取与输入相似的存储器 运算单元同时采用3 个乘法的 复数运算算法来实现.-In accordance with the requirements of high speed digital signal processing , the algorithmof radix O4 implemented with FPGA and the integrated architecture and butterfly unit are analyzed. With butterfly u2 nit input which is designed by parallel structure and the same address calculation , four operation codes the butterfly unit needs can be provided simultaneously to have the most data parallel and improve the speed of calculation. According to the rotation parameters memory regulation , the addresses of three rotation parame2 ters of butterfly unit are the same with simple style of address generation and similar input and output memo2 ries. The operating unit adopted is implemented by three complex calculation algorithm of multiplication si2 multaneously.
Platform: | Size: 360448 | Author: 王晓 | Hits:

[VHDL-FPGA-Verilog] fft

Description: an fft implementation help
Platform: | Size: 316416 | Author: amer | Hits:

[VHDL-FPGA-Verilog] studyFFTcore

Description: 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
Platform: | Size: 1287168 | Author: 徐成发 | Hits:

[VHDL-FPGA-Verilog] FPGA_FFT

Description: 基于VHDL语言的一个FFT快速傅里叶变换程序。采用4蝶形算法-VHDL language based on a FFT Fast Fourier Transform procedure. 4 butterfly algorithm used
Platform: | Size: 180224 | Author: 李超 | Hits:

[VHDL-FPGA-Verilog] design

Description: The verilog implementation of 8-point FFT in verilog. Radix 2 Decimation in Frequency.
Platform: | Size: 10240 | Author: Hong-soo | Hits:

[VHDL-FPGA-Verilog] 1204pointsFFT

Description: 1024点FFT VHDL实现,含有说明部分，自己好好理解，可自行修改-1024 point FFT VHDL realization that contain part of a good understanding of their own, they are free to modify
Platform: | Size: 27648 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] 1231234

Description: FFT在fpga下实现-FFT in fpga to achieve! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
Platform: | Size: 157696 | Author: hievery11 | Hits:

[VHDL-FPGA-Verilog] FFT

Description: Fast Fourier Transform in vhdl and matlab
Platform: | Size: 4105216 | Author: Marija | Hits:

[VHDL-FPGA-Verilog] FFT

Description: fft implementation in fpga using vhdl xilinx
Platform: | Size: 894976 | Author: prabin | Hits:

[Communication-Mobile] fft_ifft_vhdl_codes

Description: this will give details of fft and ifft implementation in vhdl codes, and then on fpga chip
Platform: | Size: 3760128 | Author: ARUN AGARWAL | Hits:

[Software Engineering] RADIX_64

Description: radix 64 point fft using vhdl design in fpga
Platform: | Size: 126976 | Author: bowya | Hits:

[assembly language] fft

Description: vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
Platform: | Size: 364544 | Author: tejaswini | Hits:

[VHDL-FPGA-Verilog] COlD_FFT

Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency It is very good
Platform: | Size: 64512 | Author: 小鸟动人 | Hits:

[VHDL-FPGA-Verilog] fft256

Description: quartus ii 中利用ip核生成fft模块，实现256点fft功能-quartus ii the use of nuclear generation fft ip module to achieve the 256 point fft function
Platform: | Size: 14550016 | Author: any | Hits:

[Software Engineering] fft

Description: FFT in VHDL code souce
Platform: | Size: 33792 | Author: jose | Hits:
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